Key Takeaways
1. Intel plans to launch the Titan Lake series in 2028, featuring an impressive 100-core design focused on a single-core architecture based entirely on E-cores.
2. The Razer Lake series, arriving in 2027, will be the last to use a mixed architecture of P-cores and E-cores, leading to a shift in Intel’s core design philosophy.
3. Titan Lake’s all-E-core setup may include variations like dense 4C clusters and 2C clusters, optimizing performance-per-area (PPA) and performance-per-Watt (PPW).
4. Nova Lake is expected to have a mixed core setup with 52 cores, while Titan Lake could potentially consist of two 48-core clusters and four low-power E-cores (LPE).
5. The trend in the CPU/SoC market is shifting towards unified core designs, as seen with competitors like AMD and Qualcomm, which could influence Intel’s future architectures.
Rumors about Intel’s future Nova Lake and Panther Lake architectures have started to emerge, and new information regarding the company’s plans for 2028 is also coming to light.
Titan Lake’s Exciting Features
If the whispers are correct, Intel is set to launch the Titan Lake series in 2028 featuring an astonishing…100 cores! Yes, you heard that right—one hundred cores! Unlike the current designs that use both P-cores and E-cores, Intel seems to be shifting towards a single-core architecture for this new lineup.
This scoop comes from @Silicon_fly on X, referencing a leaked roadmap found on Zhihu.com that outlines Intel’s processor plans through 2028. The roadmap indicates that Razer Lake, arriving in 2027, will be the last to utilize the mixed P-core and E-core setup. Razer Lake will include Griffin Cove P-cores and Golden Eagle E-cores, serving as a small upgrade to Nova Lake, which is expected to launch next year.
A New Direction for Core Design
With the Titan Lake series, Intel appears to be moving towards an all-unified core design. Interestingly, the new cores will not include P-cores; rather, they will be entirely based on E-cores, likely evolved from the larger Arctic Wolf E-cores found in Nova Lake. This change could lead to improved performance-per-area (PPA) and performance-per-Watt (PPW).
Any increase in die size and power consumption from using Arctic Wolf E-cores can be balanced out by enhanced PPA achieved through switching to a 14A process, without significantly raising the thermal design power (TDP). However, the new unified E-cores would still be more compact than the Coyote Cove and Griffin Cove P-cores used in Nova Lake and Razer Lake, respectively.
Potential Variations in Core Clusters
Although a unified core suggests an all-E-core setup, there could still be some differences within the architecture. @Silicon_fly theorizes that Intel might implement a mix of dense 4C clusters with shared L2 caches and 2C clusters that either share or have dedicated L2/L3 caches. Additionally, Titan Lake might incorporate a specialized core aimed at enhancing single-core performance.
Given that Nova Lake is projected to have a 52-core setup featuring 16 P-cores, 32 E-cores, and 4 low-power E-cores (LPE), if Titan Lake truly abandons the large P-cores, it’s conceivable to see a 100-core design consisting of two 48-core clusters along with four LPE cores.
All this remains speculative, of course, and there are still several generations to go before Titan Lake becomes a reality, so it’s wise to take this information lightly for now.
Still, the details align with the current trends we observe in the CPU/SoC market. AMD has already adopted a mix of Zen 5 classic and Zen 5c compact cores in its Ryzen Strix Point APUs. MediaTek has shifted to an all-big core design, starting with the Dimensity 8400, which features a 1+3+4 configuration without efficiency cores. The flagship Dimensity 9400 SoC also utilizes a big core cluster in a similar fashion.
Furthermore, Qualcomm has opted for a 2 Prime + 6 Performance all-Oryon architecture for its Snapdragon 8 Elite. It remains uncertain what Apple has planned for its upcoming A and M series chips, but the industry seems to be leaning more towards unified core clusters designed for various tasks rather than mixed architectures.
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