Key Takeaways
1. Apple has reduced the die area of its A19 Pro from 105 mm² to 98.6 mm² using TSMC’s advanced N3P node.
2. The A19 Pro features six GPU cores and maintains a similar design structure to its predecessors, the A18 Pro and A17 Pro.
3. MediaTek increased its die area to meet performance goals, while Qualcomm kept a similar die size.
4. Future A20/A20 Pro models are expected to use TSMC’s N2 node with a gate-all-around design for higher transistor density.
5. The advancements in SoC technology reflect ongoing improvements in performance and efficiency in semiconductor design.
After sharing thorough teardowns of the Snapdragon 8 Elite Gen 5 and Dimensity 9500, semiconductor specialist @KurnalSalts has now revealed a detailed die image of Apple’s newest flagship SoC, the A19 Pro. MediaTek had to increase die area to comply with performance goals. Conversely, Qualcomm managed to maintain a similar die size.
Apple’s Die Area Reduction
In contrast, Apple has actually decreased its die area from 105 mm² to 98.6 mm². This achievement is largely due to utilizing TSMC’s advanced N3P node, which enables Apple to fit more transistors within the same space. The A19 Pro variant discussed here is the full version, featuring six GPU cores. Design-wise, not much has shifted, as the A19 Pro essentially retains the same structure as the A18 Pro (TSMC N3E) and A17 Pro (TSMC N3B) that came before it.
Future Developments in SoC Design
We might observe some variations in the forthcoming A20/A20 Pro, since it is anticipated to utilize TSMC’s N2 node – a first in using a gate-all-around design. This innovation will allow for even greater transistor density, which should lead to a significant boost in performance.
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