Key Takeaways
1. AMD plans to increase the CPU core count per CCD to 12 for Zen 6 CPUs, a 50% increase from the 8-core CCDs in Zen 5.
2. Zen 6 CPUs will feature larger L3 cache sizes, with around 48 MB per CCD for client models and up to 128 MB for server models.
3. The potential total core count for the flagship Zen 6 chip could reach 24 cores and 48 threads.
4. Future Ryzen 7 X3D CPUs might offer 12 cores and a total of 144 MB of L3 cache, significantly enhancing gaming performance.
5. Current information is speculative, and final specifications for Zen 6 CPUs are yet to be confirmed.
Thanks to a lot of reports that have come out recently, we now have a clearer picture of what AMD is planning with their Zen 6 CPU architecture. The main areas AMD is looking at include increasing the CPU core count, enlarging the L3 cache, and raising clock speeds, which should provide a significant performance boost compared to Zen 5.
Core Count and Cache Size Updates
Regarding the increase in CPU core counts and L3 cache sizes, there’s now more evidence about AMD’s intentions. HXL shared information on X, indicating that AMD plans to raise the core count per CCD to 12 for the Zen 6 CPUs. This marks a 50% increase compared to the current Zen 5 Ryzen 9000 CPUs, which utilize 8-core CCDs. Therefore, the flagship Ryzen 9 9950X uses two 8-core CCDs. If this trend continues, the Zen 6 flagship chip could potentially feature as many as 24 total cores and an impressive 48 threads.
Plans for Epyc Server CPUs
Moreover, AMD might also be working on 32-core CCDs for their Epyc server CPUs. To fit 32 cores on a single CCD, the cores will likely need to be notably smaller than those found in the client Zen 6 CPUs. Thus, it’s expected that there will be 32 Zen 6c cores per CCD rather than the standard Zen 6 cores.
As previously mentioned, Zen 6 CPUs will also feature more L3 cache compared to their Zen 5 predecessors. HXL reports that the client “Olympic Ridge” Zen 6 SKUs will have around 48 MB of L3 cache per CCD, while server chips could see a massive 128 MB L3 cache per CCD.
Comparison with Current Models
For context, the Ryzen 9 9950X provides 32 MB of L3 cache per CCD, resulting in a total of 64 MB. Thus, the increase in L3 cache could mean that the dual-CCD Ryzen 9 Zen 6 flagship could reach 96 MB total. This is quite significant for average users, and a per-CCD L3 cache of 48 MB is also substantial for gamers.
The Ryzen 7 9800X3D, which is currently the fastest gaming CPU available, has one CCD with 8 cores, 16 threads, and 32 MB of L3 cache. With a single 64 MB 3D V-Cache stack positioned below the CCD, the total L3 cache amounts to 96 MB. If Zen 6 indeed offers 48 MB of L3 cache per CCD, then the successor to the Ryzen 7 9800X3D could potentially have 112 MB of total L3 cache, assuming AMD maintains the same 3D V-Cache amount.
Potential for a New Gaming Champion
This is where things become really intriguing. Kepler_L2 responded to HXL’s post, suggesting that AMD might also raise the total 3D V-Cache from 64 to 96 MB. When combined with the 48 MB of L3 cache for a Zen 6 CCD, a future Ryzen 7 X3D CPU could feature 12 cores and a whopping 144 MB of L3 cache.
In summary, if AMD does launch a Zen 6 X3D chip with 144 MB of cache, 12 cores, and higher clock speeds than the Ryzen 7 9800X3D, Team Red might just hold onto the gaming performance title for another generation. However, this information is still speculative and based on rumors. The exact specifications of the final Zen 6 CPUs remain to be seen.
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