Key Takeaways
1. Intel’s Panther Lake mobile system-on-chips (SoCs) release has been delayed until 2026 due to performance issues with the 18A semiconductor manufacturing process.
2. Analyst Ming-Chi Kuo reports that mass production for Panther Lake has shifted from early September 2025 to late 2025.
3. The delay could negatively impact Intel’s revenue, profits, and trust within the supply chain in the second half of 2025.
4. The 18A manufacturing method uses RibbonFET transistors and PowerVia technology, but performance yields have been disappointing.
5. Intel aims to compete with TSMC’s 2N process, but current results have not met expectations.
A recent report from a well-known analyst indicates that the release of Intel’s Panther Lake mobile system-on-chips (SoCs) has been delayed until 2026. The delay is attributed to the underwhelming performance of Intel’s 18A semiconductor manufacturing process, which incorporates RibbonFET transistors and PowerVia technology. Panther Lake is expected to be the next advancement in Team Blue’s line of notebook and mobile processors, promising major performance enhancements over the existing Meteor Lake processors.
Analyst Insights on Production Delays
Market analyst Ming-Chi Kuo, who is recognized for his insights into Apple’s manufacturing supply chain, has provided new information from his latest review of Electronics Manufacturing Service (EMS), Original Design Manufacturing (ODM), and several brands. According to him, the mass production schedule for Intel’s Panther Lake (PTL) series has shifted from early September 2025 to the middle of the fourth quarter of 2025. Consequently, devices and notebooks powered by these Panther Lake chips might not reach consumers until 2026.
Impact on Intel’s Revenue and Trust
Initially, Intel had planned for production to begin in the second half of 2025, meaning this delay still falls within that timeframe. However, the inability to launch new products utilizing this new hardware could negatively affect Intel’s revenue, profits, and overall trust within the supply chain for the second half of 2025, as noted by the analyst.
Intel is facing delays in the production of PTL chips largely due to disappointing performance yields from its 18A manufacturing method. This method employs RibbonFET technology, a Gate-all-around (GAA) transistor that aims to enhance both density and performance. It also incorporates PowerVia, which is a backside-power delivery structure designed to boost cell utilization by 5 to 10% and improve ISO-power performance by as much as 4%, as stated by Intel. With this approach, Intel hopes to rival TSMC’s 2N process, but so far, the results have not met expectations, at least for the time being.
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