Tag: Samsung Foundry Innovations

  • Samsung’s 3nm Process Faces Power Efficiency and Yield Challenges

    Samsung’s 3nm Process Faces Power Efficiency and Yield Challenges

    According to some previous rumors, Samsung has achieved success with its 3nm process nodes and the development of its 2nm process nodes is also progressing smoothly.

    However, a recent report from Businesskorea indicates that Samsung Foundry’s 3nm process remains significantly inferior to TSMC’s, both in yield rate and power efficiency. For those unfamiliar, higher yield rates mean more functional chips per wafer, lowering the cost per chip and increasing profitability.

    Industry Preferences

    As a result, it is expected that most fabless manufacturers including NVIDIA, AMD, Intel, Qualcomm, MediaTek, and Apple will continue to rely on TSMC for their 3nm chips. It has also been reported that Google will switch to TSMC for its 2025 flagship chipset Tensor G5. Notably, the Tensor G4, which will power the upcoming Pixel 9 series, will still be manufactured by Samsung Foundry and will be based on an updated 4nm process.

    Production Challenges

    Samsung talked about the mass production of their 3nm chips 3 years ago. Back in June 2022, Samsung Foundry was the first in the industry to apply the 3nm gate-all-around (GAA) process to mass production. However, due to the limitations, the company is still struggling to secure customers for the end product. The first generation 3nm process node (SF3E) has performed below the company’s expectations when it comes to performance and power efficiency. It has reportedly been adopted by some niche scenarios like chips for cryptocurrency mining. However, a widespread adoption will still require more improvements in power efficiency and yield rates.

    Yield Rate Issues

    The relatively lower yield rates and power efficiency of Samsung Foundry’s process nodes have long been problematic and are considered the main reasons for the performance gap between Snapdragon (those that are fabricated by TSMC) and Exynos-powered Galaxy devices.

    According to a previous report, Qualcomm is considering a dual-sourcing strategy by partnering with Samsung Foundry alongside TSMC. While this is aimed at securing the company’s business by not relying on a single manufacturer, the company’s CEO mentioned “the current focus must be on the foundry production at TSMC.”

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  • Samsung Unveils 2nm, 4nm, 1.4nm Nodes to Boost AI Technology

    Samsung Unveils 2nm, 4nm, 1.4nm Nodes to Boost AI Technology

    Samsung has recently showcased its newest foundry advancements and shared its vision for the AI era at an event held at their Device Solutions America headquarters in San Jose, California.

    ![Samsung](Image: Samsung)

    To compete in the AI industry, Samsung has been focusing on developing future process nodes and has reportedly achieved some milestones. The company is introducing three new process nodes – SF2Z, SF1.4, and SF4U. As inferred from their names, these are Samsung’s most advanced 2nm, 1.4nm, and 4nm process nodes to date. These nodes will be integrated into the Samsung AI Solutions platform.

    GAA Process and Co-Packaged Optics

    In addition to the GAA process, which the company claims is ideal for AI accelerators, Samsung plans to introduce integrated, co-packaged optics (CPO) technology aimed at high-speed, low-power data processing. This was revealed by Dr. Siyoung Choi, President and Head of Foundry Business at Samsung Electronics.

    The Latest 2nm Process – SF2Z

    Samsung’s latest 2nm process, SF2Z, includes optimized backside power delivery network (BSPDN) technology. The new process places power rails on the backside of the wafer to eliminate bottlenecks between power and signal lines.

    Thanks to the BSPDN technology, SF2Z offers better performance compared to SE2, the first-generation 2nm process node. Additionally, SF2Z significantly reduces voltage drop (IR drop), boosting the performance of HPC designs. Samsung mentioned that mass production for the SF2Z process node would begin in 2027.

    New 4nm and 1.4nm Nodes

    “SF4U is a high-value 4nm variant that provides PPA improvements by incorporating optical shrink,” noted the company. Mass production for this node is scheduled for 2025.

    Furthermore, a 1.4nm node (SF1.4) is also under development, with progress moving “smoothly.” This smallest of the three nodes is also set for mass production by 2027.

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